1. Field of the Invention
This invention relates to a switching power source; and, more particularly, to an improved resonance type switching power source which can be readily miniaturized and which has improved efficiency and reduced switching loss.
2. Description of the Prior Art
In the prior art, a current discontinuous mode flyback resonance type circuit, such as shown in FIG. 1, has been used to reduce switching loss in a switching power source. This circuit utilizes the phenomenon of voltage resonance with the inductance of a primary winding and the capacitance of a resonance capacitor, after the secondary current becomes zero.
In FIG. 1, a rectified AC input voltage V.sub.IN, for example, is applied to a circuit comprising a capacitor C.sub.1 connected between one input terminal, whereat voltage V.sub.IN is supplied, and earth; a resistance R.sub.1 for activating control circuit CTL, one end of which is connected to one end of a primary winding of an inductance L.sub.P (called "primary winding") and the other end of which is connected to control circuit CTL; a MOSFET Q.sub.1 (which may be a bipolar transistor) used as a switching element, the drain electrode of which is connected to the other end of primary winding L.sub.P and the source electrode of which is connected to earth, and the gate electrode of which is connected to control circuit CTL; a secondary winding inductance L.sub.S (called "secondary winding"); and a bias winding inductance L.sub.B (called "bias winding"). The capacitor C.sub.1 serves to rectify the voltage from the input. Primary winding L.sub.P, secondary winding L.sub.S and bias winding L.sub.B are wound about the same core of transformer T.
The circuit further comprises a resonance capacitor C.sub.r connected in parallel between the source electrode and the drain electrode of switching element Q.sub.1 ; a rectifying diode D.sub.1 for creating a power source for control circuit CTL; resistors R.sub.2 and R.sub.3 for dividing a rectified smoothed output from bias winding voltage V.sub.B, the anode of diode D.sub.1 being connected to one end of bias winding L.sub.B and the cathode of diode D.sub.1 being connected to earth via the dividing circuit comprising R.sub.2 and R.sub.3 and being connected also to earth via capacitor C.sub.3. Capacitor C.sub.r may also be connected in parallel to primary winding L.sub.P with the same effect. Also, C.sub.3 is a smoothing capacitor. The connection point between resistors R.sub.2 and R.sub.3 is connected to control circuit CTL to provide a feedback signal. The connection point between the cathode of diode D.sub.1, resistor R.sub.2 and capacitor C.sub.3 is connected to the connection point between resistor R.sub.1 and control circuit CTL.
Diode D.sub.2 rectifies voltage generated in secondary winding L.sub.S and is connected to smoothing capacitor C.sub.2. The another of diode D.sub.2 is connected to one end of secondary winding L.sub.S and the cathode thereof is connected to an output terminal and to one end of capacitor C.sub.2. The other end of capacitor C.sub.2 is connected to the other end of secondary winding L.sub.S and to another input terminal.
Zero cross detecting circuit ZCD detects the zero axis crossing by bias winding voltage V.sub.B. After the zero cross output V.sub.1 is delayed by a certain period of time, e.g. a quarter of a resonance period, by a delay circuit DLY, it is added to a waveform shaping circuit WS to perform edge differentiation and to provide a synchronization signal SYNC (also labeled V.sub.2) for the control circuit CTL. The edge differentiation in waveform shaping circuit WS is not necessary when the control circuit CTL is synchronized at the leading or trailing edge.
The circuit thus described is basically a flyback converter. That is, when switching element Q.sub.1 is ON, no current flows in secondary winding L.sub.S because diode D.sub.2 is inverse biased by the voltage induced by secondary winding L.sub.S. When switching element Q.sub.1 is ON, primary winding L.sub.P is excited by voltage V.sub.IN and energy is stored in transformer T. When switching element Q.sub.1 is OFF, secondary winding L.sub.S is reset by the output voltage and energy stored in transformer T is supplied to the load.
Operation of the FIG. 1 circuit will now be discussed with reference to waveform charts of FIGS. 2(A)-2(G).
When a pulse signal of a voltage V.sub.GS (see FIG. 2(G)) which exceeds a threshold value for turning ON switching element Q.sub.1, is applied between the gate electrode and the source electrode of switching element Q.sub.1 from control circuit CTL, switching element Q.sub.1 is turned ON. As a result, a drain current I.sub.D (see FIG. 2(A)) increases with a slope or inclination of V.sub.IN /L.sub.P, as indicated by the waveform. When switching element Q.sub.1 is turned ON, after a time T.sub.ON, corresponding to the output voltage, elapses, energy stored in transformer T is released from secondary winding L.sub.S and charges capacitor C.sub.2. Current I.sub.S, flowing in diode D.sub.2, decreases with a slope of about -V.sub.out /L.sub.S and soon becomes zero, as shown in FIG. 2(B), ignoring the forward voltage in diode D.sub.2. Although there is a current continuous mode flyback converter which turns ON switching element Q.sub.1 again before current I.sub.S becomes zero, a current discontinuous mode by which current I.sub.S once becomes zero is discussed hereat.
When current I.sub.S becomes zero, diode D.sub.2 is turned OFF, and secondary winding L.sub.S is shifted to a high impedance state. As a result, voltage in the primary winding starts to resonate at time periods determined by the inductance L.sub.P and capacitance C.sub.r, and decreases with a cosine curve. In terms of voltage V.sub.DS between the drain electrode and the source electrode of switching element Q.sub.1, it decreases with a cosine curve from V.sub.IN +N+(V.sub.o * V.sub.f) to V.sub.IN -N *(V.sub.o +V.sub.f), as shown in FIG. 2(C). Note that, V.sub.f is the forward voltage of diode D.sub.2.
Because switching loss of a MOSFET is typically expressed by 0.5 * (C.sub.oss +C.sub.r) * V.sub.DS * V.sub.DS * f, wherein f is the switching frequency, when a parasitic capacitance between the drain electrode and the source electrode is C.sub.oss, switching loss becomes great if voltage V.sub.DS between the drain electrode and the source electrode is increased, requiring a larger heat sink, etc., and increasing the difficulty of thermal design. Also, because it is proportional to an increase in switching frequency.
In FIG. 1, switching loss is minimized by reducing the drain source voltage V.sub.DS. It is accomplished by detecting the lowest point of the resonance waveform and turning ON MOSFET Q.sub.1 at that point, as shown in FIG. 2(C). While the waveform shown in FIG. 2(D) may be obtained in biased winding L.sub.B, the zero crossing point of this waveform advances by a quarter of the resonance period from the lowest point of the voltage V.sub.DS. In actual practice, it is necessary to use a zero cross point which is delayed only by that period of time. The output V.sub.2 of the waveform shaping circuit WS, shown in FIG. 2(F), is the delayed pulse thereof. This pulse V.sub.2 is used to synchronize control circuit CTL, and trigger switching element Q.sub.1 to turn it ON.
As a result of the foregoing operation, switching period T becomes T=T.sub.ON +T.sub.r +T.sub.OFF. T.sub.r is one half of the resonance period determined by inductance L.sub.P and capacitance C.sub.r, and may be expressed approximately by T.sub.r =pi[L.sub.P (C.sub.4 +C.sub.oss)].sup.1/2, as a constant value.
However, T.sub.ON and T.sub.OFF largely change, depending on input voltage V.sub.IN and output load. In particular, the influence of the load is great. Considering changes of the load from several % to 100% of the rating, switching period T may change by more than 10 times. Because switching loss is proportional to the switching frequency also, as described before, the loss at the maximum frequency becomes great if the frequency changes by more than 10 times (normally from several tens of kHz to several hundreds of kHz) and it becomes difficult to raise the lowest frequency. It then becomes a factor which obstructs miniaturization of the apparatus.
Also, the transformer and input filter, etc., are required to cover a very extensive frequency band of more than 10 times, causing great difficulty in design.